Senior Principal Engineer, Verification (Ethernet, Serdes, UVM)
Company: Marvell Technology
Location: Santa Clara, CA
Senior Hardware Design Engineer
Company: Intel
Location: Santa Clara, CA
GPU Logic Design Engineer
Company: Intel
Location: Santa Clara, CA
Logic Design Methodology Engineer
Company: Intel
Location: Santa Clara, CA
Analog Circuit Design Engineer
Company: Intel
Location: Santa Clara, CA
Mixed Signal Logic Design Engineer
Company: Intel
Location: Santa Clara, CA
Memory PHY RTL Design Engineer
Company: Advanced Micro Devices, Inc
Location: Santa Clara, CA
Microarchitect and RTL Design Engineer
Company: Baya Systems
Location: Santa Clara, CA
EDA Design Flow Development Engineer
Company: Intel
Location: Santa Clara, CA
Senior Physical Design Analog Integration Engineer
Company: Intel
Location: Santa Clara, CA