Tech Lead Firmware Engineer (DDR technologies)
Company: Astera Labs
Location: Santa Clara, CA
RF/Analog IC Design Engineer
Company: Qualcomm
Location: Santa Clara, CA
Sr Site Reliability Engineer (SASE)
Company: Palo Alto Networks
Location: Santa Clara, CA
Sr. Machine Learning Engineer, Deployment (Edge)
Company: Peloton Interactive, Inc.
Location: Santa Clara, CA
Modeling and Simulation Engineer (simulation focused)
Company: Atomic Machines
Location: Santa Clara, CA
Mid-Level Electrical Manufacturing NPI Engineer
Company: Arista Networks
Location: Santa Clara, CA
Senior ASIC Design Engineer - Memory Controller
Company: NVIDIA Corporation
Location: Santa Clara, CA
Principal CPU Systems Debug Architecture/RTL Engineer
Company: Qualcomm
Location: Santa Clara, CA
ASIC Design Verification Principal Engineer (Hardware)
Company: Palo Alto Networks
Location: Santa Clara, CA
ASIC Design Verification Principal Engineer (Hardware)
Company: Palo Alto Networks
Location: Santa Clara, CA
