Engineer, Senior|7217
Apply NowCompany: ATR International
Location: San Diego, CA 92154
Description:
We are seeking an enthusiastic & detail-oriented engineer & problem solver to be a part of our post-silicon validation team (in San Diego, CA) Our team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon We work closely with architects, designers, verification engineers, software engineers, and customers Our goal is to make best quality of Silicon available to customers using a rigorous validation approach that is automated, efficient & scalable.
We are seeking to add an experienced and versatile engineer to our team, to execute & streamline our validation processes To fit this role, you should have hands on experience with post-silicon validation, automation and excellent problem-solving & communication skills Job responsibilities include:
Strong grasp of concepts & workings of SoCs, SOC architectures, CPUs, DDRs, on chip bus & networking protocols & embedded system concepts
Strong understanding of challenges with DDR, high-speed peripherals/buses, GPIOs
Strong knowledge of test platforms for SOCs and testing methodologies
Manage recurring High Volume Validation tasks such as execution of tests, scheduling regression jobs, analyzing results and triaging failures
Debugging test failures & platforms
Strong aptitude to improve existing & drive new stress testing methodologies
Develop automation solutions for operations and to scale SOC validation and integration activities.
Provide Lab support for HW configuration management & logistics
Manage jobs for robotic handlers
Lab IT activities
Comprehend & refine processes by interacting with Project managers, leads, users & software engineers Create end-to-end automation requirements & solutions.
Formalize and document validation processes (inputs, flowchart, outputs, dashboards) working with stakeholders & publish results
Attend and drive periodic team meetings & ad hoc brainstorming sessions
Manage lab infrastructure challenges
Customer support
Requirement:
Top 5 Required Skills:
1. Experience with post-silicon enabling, bring-up , analyze failures at the embedded platform level, debugging low level software and hardware issues & debug tools including JTAG
2.Using Lab Equipment (Logic Analyzer, Scope, Signal Generator, Thermal Chambers, TCUs etc.)
3.Board level expertise
4.Automation
5.IT Skills - PCs, SW configurations
6.Excellent communication skills
Technologies:
1.JTAG/Lauterbach
2.SOC knowledge
3.Compiler toolchain for embedded SW like LLVM or GCC
4.Python, Object Oriented Programming, Programming Concepts
5.Jenkins, Jira, Splunk or similar web-based enterprise/BI applications
Preferred:
1.Basic understanding of power and performance
2.Knowledge of TCU, PVT, Fmax, Vmin test methodology and hands-on experience
3.CPU and SoC architectures
4.Experience using Handlers/Automated pick & place machines
5.Program & logistics management experience
Physical Requirements (Lifting, outdoor work, travel):
Carrying/moving Hardware/Equipment up to 20lb.
Driving Requirements:
Are their driving responsibilities no matter how minimal with this role?
-May have to drive between campus buildings using personal vehicle or Qualcomm shuttle to carry lab Hardware
If yes, how many hours of driving per week?
-< 2 hrs per week
Key Words:
Validation, post-silicon, emulation, python, Jenkins, SQL, Splunk, GCC, LLVM, Jira, C/C++, IP, CPU, GPU, DDR, Jtag, Lauterbach, SoC, Lab Equipment, pre-si debug, post-si debug, Emulation, PVT, scripting
We are seeking to add an experienced and versatile engineer to our team, to execute & streamline our validation processes To fit this role, you should have hands on experience with post-silicon validation, automation and excellent problem-solving & communication skills Job responsibilities include:
Strong grasp of concepts & workings of SoCs, SOC architectures, CPUs, DDRs, on chip bus & networking protocols & embedded system concepts
Strong understanding of challenges with DDR, high-speed peripherals/buses, GPIOs
Strong knowledge of test platforms for SOCs and testing methodologies
Manage recurring High Volume Validation tasks such as execution of tests, scheduling regression jobs, analyzing results and triaging failures
Debugging test failures & platforms
Strong aptitude to improve existing & drive new stress testing methodologies
Develop automation solutions for operations and to scale SOC validation and integration activities.
Provide Lab support for HW configuration management & logistics
Manage jobs for robotic handlers
Lab IT activities
Comprehend & refine processes by interacting with Project managers, leads, users & software engineers Create end-to-end automation requirements & solutions.
Formalize and document validation processes (inputs, flowchart, outputs, dashboards) working with stakeholders & publish results
Attend and drive periodic team meetings & ad hoc brainstorming sessions
Manage lab infrastructure challenges
Customer support
Requirement:
Top 5 Required Skills:
1. Experience with post-silicon enabling, bring-up , analyze failures at the embedded platform level, debugging low level software and hardware issues & debug tools including JTAG
2.Using Lab Equipment (Logic Analyzer, Scope, Signal Generator, Thermal Chambers, TCUs etc.)
3.Board level expertise
4.Automation
5.IT Skills - PCs, SW configurations
6.Excellent communication skills
Technologies:
1.JTAG/Lauterbach
2.SOC knowledge
3.Compiler toolchain for embedded SW like LLVM or GCC
4.Python, Object Oriented Programming, Programming Concepts
5.Jenkins, Jira, Splunk or similar web-based enterprise/BI applications
Preferred:
1.Basic understanding of power and performance
2.Knowledge of TCU, PVT, Fmax, Vmin test methodology and hands-on experience
3.CPU and SoC architectures
4.Experience using Handlers/Automated pick & place machines
5.Program & logistics management experience
Physical Requirements (Lifting, outdoor work, travel):
Carrying/moving Hardware/Equipment up to 20lb.
Driving Requirements:
Are their driving responsibilities no matter how minimal with this role?
-May have to drive between campus buildings using personal vehicle or Qualcomm shuttle to carry lab Hardware
If yes, how many hours of driving per week?
-< 2 hrs per week
Key Words:
Validation, post-silicon, emulation, python, Jenkins, SQL, Splunk, GCC, LLVM, Jira, C/C++, IP, CPU, GPU, DDR, Jtag, Lauterbach, SoC, Lab Equipment, pre-si debug, post-si debug, Emulation, PVT, scripting