Sr Design Verification Engineer
Apply NowCompany: Encore Semi LLC
Location: Minneapolis, MN 55407
Description:
Job Title: Sr Design Verification Engineer
Full-time: W2 Hourly + Benefits + Bonuses or Contractor
Location: Remote in US only
US Citizenship required
About the Team:
Join the growing Encore Semi Front-End Development team to design and verify ASICs and SoCs targeting next generation applications. Building on your background of Design Verification, RTL coding and IP Integration. As a DV Engineer you will work with the team and participate in developing state-of-the-art features at the block and full-chip level.
Essential Duties and Qualifications:
Reviewing and editing target specifications as required for completeness and feasibility.
Developing architectures and specifications for complex design blocks and SOCs
Implementing complex digital designs using reusable RTL methods (Verilog, VHDL, SystemVerilog)
Complex computational architectures and algorithms, such as multi-rate/DSP and P design
Modern verification methods, incl. directed/constrained-random stimuli, assertions, TLM and UVM
Collaborative creation of comprehensive verification plans and coverage metrics
Multi-supply-domain and UPF methods
Constraining and synthesizing digital designs to target cell libraries.
Static timing, power, and SI analyses of complex digital designs
Supporting place & route efforts, incl. P/G and floorplanning, timing and physical constraints, gated CTS, MCMM setups, back-annotation, timing closure, equivalence checking
Planning, implementing, and analyzing designs for DFT, test hooks, and scan/ATPG/JTAG/BIST, and supporting production test with ATE patterns (ATPG and functional) and time set definitions.
Proficiency with Synopsys EDA, incl. DC-Topo, VCS-MX, PrimeTime, Formality, TetraMAX
Proficiency with Mentor EDA, incl. Questa, ADMS, Tessent
Modern revision-control tools and best-practices in a collaborative, multi-site design community
Proficiency with UNIX/Linux incl. shell scripting, text utilities (e.g. sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scripting.
Proficiency with Windows apps, incl. Word, Excel, PowerPoint, Visio, Project, PDF conversion
Qualifications:
Bachelors/master's in electronic engineering/computer science or equivalent
10+ years of direct industry experience with ASIC and/or SoC design
A strong background in RTL based digital IC design using Verilog/SystemVerilog
Proven track record of first-pass successes
A self-starter with the ability to assume leadership roles.
Ability to work well in a diverse team environment.
Willingness to Mentor less senior engineers.
Experience with industry standard development tools and methodologies.
US Citizenship required
Full-Time Benefits:
15 days of PTO per calendar year
10 paid Holidays per calendar year
Comprehensive Medical Benefits: Company pays 80% of medical premium for Employee and Dependents
Dental & Vision: Company pays 50% of Dental and Vision premiums for Employee and Dependents
Voluntary Benefits: Dental & Vision Insurance, FSA, HSA and Gap Insurance
Employee Assistant Program (EAP)
401k Traditional & Roth
Life/AD&D and Long-Term Disability
Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Our management team is dedicated to this policy with respect to recruitment, hiring, placement, promotion, transfer, training, compensation, benefits, employee activities, and general treatment during employment.
Full-time: W2 Hourly + Benefits + Bonuses or Contractor
Location: Remote in US only
US Citizenship required
About the Team:
Join the growing Encore Semi Front-End Development team to design and verify ASICs and SoCs targeting next generation applications. Building on your background of Design Verification, RTL coding and IP Integration. As a DV Engineer you will work with the team and participate in developing state-of-the-art features at the block and full-chip level.
Essential Duties and Qualifications:
Reviewing and editing target specifications as required for completeness and feasibility.
Developing architectures and specifications for complex design blocks and SOCs
Implementing complex digital designs using reusable RTL methods (Verilog, VHDL, SystemVerilog)
Complex computational architectures and algorithms, such as multi-rate/DSP and P design
Modern verification methods, incl. directed/constrained-random stimuli, assertions, TLM and UVM
Collaborative creation of comprehensive verification plans and coverage metrics
Multi-supply-domain and UPF methods
Constraining and synthesizing digital designs to target cell libraries.
Static timing, power, and SI analyses of complex digital designs
Supporting place & route efforts, incl. P/G and floorplanning, timing and physical constraints, gated CTS, MCMM setups, back-annotation, timing closure, equivalence checking
Planning, implementing, and analyzing designs for DFT, test hooks, and scan/ATPG/JTAG/BIST, and supporting production test with ATE patterns (ATPG and functional) and time set definitions.
Proficiency with Synopsys EDA, incl. DC-Topo, VCS-MX, PrimeTime, Formality, TetraMAX
Proficiency with Mentor EDA, incl. Questa, ADMS, Tessent
Modern revision-control tools and best-practices in a collaborative, multi-site design community
Proficiency with UNIX/Linux incl. shell scripting, text utilities (e.g. sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scripting.
Proficiency with Windows apps, incl. Word, Excel, PowerPoint, Visio, Project, PDF conversion
Qualifications:
Bachelors/master's in electronic engineering/computer science or equivalent
10+ years of direct industry experience with ASIC and/or SoC design
A strong background in RTL based digital IC design using Verilog/SystemVerilog
Proven track record of first-pass successes
A self-starter with the ability to assume leadership roles.
Ability to work well in a diverse team environment.
Willingness to Mentor less senior engineers.
Experience with industry standard development tools and methodologies.
US Citizenship required
Full-Time Benefits:
15 days of PTO per calendar year
10 paid Holidays per calendar year
Comprehensive Medical Benefits: Company pays 80% of medical premium for Employee and Dependents
Dental & Vision: Company pays 50% of Dental and Vision premiums for Employee and Dependents
Voluntary Benefits: Dental & Vision Insurance, FSA, HSA and Gap Insurance
Employee Assistant Program (EAP)
401k Traditional & Roth
Life/AD&D and Long-Term Disability
Tuition reimbursement
Equal Opportunity Policy Statement
Encore Semi, Inc. is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, religion, creed, color, age, sex, sexual orientation, gender, gender identity or expression, national origin, genetics, ancestry, marital status, civil union status, medical condition, disability (mental and physical), military and veteran status, pregnancy, childbirth and related medical conditions, or any other characteristic protected by applicable federal, state, or local laws and ordinances.
Encore Semi is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Our management team is dedicated to this policy with respect to recruitment, hiring, placement, promotion, transfer, training, compensation, benefits, employee activities, and general treatment during employment.