System Architect - High-Speed Interconnect

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Company: BizLink Group

Location: Fremont, CA 94536

Description:

Overview:
As a System Architect for High-Speed Interconnect, you will lead the architectural design and development of next-generation interconnect systems, including high-speed cable assemblies, optical modules, network interface cards (NICs), and system-level interconnect architectures. Your role will involve defining the technical vision, setting system-level requirements, and ensuring that interconnect solutions deliver high signal integrity, low latency, and scalability for data centers, networking, and HPC environments. You will collaborate across engineering, silicon, mechanical, and manufacturing teams to drive innovation and excellence in system-level interconnect design.

Key Responsibilities:

System Architecture & Design
  • Define system-level architecture for high-speed interconnect solutions (e.g., PCIe, Ethernet, CXL).
  • Develop performance, latency, power, and reliability targets for interconnect subsystems.
  • Create signal integrity (SI) and power integrity (PI) budgets and drive design trade-offs.
  • Select appropriate interconnect technologies: copper, optical, co-packaged, or pluggable.
  • Specify mechanical and thermal constraints for interconnect integration.
Technical Leadership
  • Lead cross-functional technical reviews across EE, SI/PI, optics, firmware, and mechanical domains.
  • Ensure design alignment with end-to-end system requirements, including data center and HPC use cases.
  • Guide the evaluation of new interconnect standards and emerging technologies (e.g., 224G, CPC, CPO, Flyover).
  • Collaborate with silicon vendors to ensure PHY compliance and electrical compatibility.
Prototype Development & Validation
  • Oversee the architectural definition of prototypes and proof-of-concept platforms.
  • Define test methodologies for channel performance, eye diagram margin, and BER.
  • Work closely with lab validation teams to debug and optimize interconnect performance.
Cross-Functional Integration
  • Partner with hardware, firmware, and platform teams to deliver optimized board- and system-level interconnect paths.
  • Contribute to board layout reviews, connector footprint decisions, and material stackups.
  • Align with manufacturing and test engineering to ensure scalability and production readiness.

Equal Employment Opportunity (EEO) Statement:

BizLink Technology, Inc. is an equal opportunity employer and is committed to providing a work environment free from discrimination. We celebrate diversity and are dedicated to creating an inclusive workplace for all employees. All employment decisions at BizLink Technology, Inc. are based on business needs, job requirements, and individual qualifications, without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, age, disability, or any other status protected by the laws or regulations in the locations where we operate.

Compensation Disclosure:

The salary range provided for this position is based on the anticipated compensation for a candidate with relevant experience and qualifications. Please note that the final salary offer may vary depending on individual skills, experience, and other factors. Compensation details will be discussed during the interview process and finalized in accordance with company policies.

Requirements

Qualifications:
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related discipline.
  • 7+ years of experience in high-speed system design, architecture, or electrical hardware engineering.
  • Deep knowledge of signal integrity, transmission line theory, and high-speed interfaces (PCIe, Ethernet, SerDes).
  • Experience in NIC or switch architecture, server platforms, or high-performance computing systems.
  • Familiarity with simulation and analysis tools such as HFSS, ADS, or HSPICE.
  • Strong technical communication and cross-disciplinary collaboration skills.
Preferred Qualifications:
  • Experience with co-packaged technology (CPC, CPO), linear drive optics, or advanced backplane interconnects.
  • Contributions to industry standards or working groups (e.g., OCP, IEEE, PCI-SIG, OIF).
  • Fluency in English and Mandarin is a plus.
  • Experience in system-level electromagnetic compatibility (EMC) and thermal co-design.

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