Mixed-Signal Behavioral Modeling Engineer
Apply NowCompany: Apple
Location: Cupertino, CA 95014
Description:
Summary
At Apple, we are dedicated to designing products that enrich the lives of our users. Are you passionate about tackling challenges that have yet to be resolved? Do you thrive in innovative environments? We have a technically demanding Mixed-Signal Clocking and Control RTL Design position on our team. As a valued member of this group, you will have the opportunity to contribute to the development of groundbreaking products that will captivate and empower millions of Apple customers worldwide.
Description
In this role, you will be responsible for designing logic used to calibrate and control circuits such as oscillators, delay lines and phase interpolators. The logic design will involve working with multiple clocks, complex clock domain crossings, signal processing and control systems. You will need to analyze control loops for critical parameters such as gain, latency, transients and jitter. You will work closely with static timing experts for timing closure and front-end quality tools such as Lint/CDC/RDC. You will work with system architects to determine implementation of new designs, and with design verification teams to craft/debug tests. You will also contribute to post-silicon debug and analysis of these designs.
At Apple, we are dedicated to designing products that enrich the lives of our users. Are you passionate about tackling challenges that have yet to be resolved? Do you thrive in innovative environments? We have a technically demanding Mixed-Signal Clocking and Control RTL Design position on our team. As a valued member of this group, you will have the opportunity to contribute to the development of groundbreaking products that will captivate and empower millions of Apple customers worldwide.
Description
In this role, you will be responsible for designing logic used to calibrate and control circuits such as oscillators, delay lines and phase interpolators. The logic design will involve working with multiple clocks, complex clock domain crossings, signal processing and control systems. You will need to analyze control loops for critical parameters such as gain, latency, transients and jitter. You will work closely with static timing experts for timing closure and front-end quality tools such as Lint/CDC/RDC. You will work with system architects to determine implementation of new designs, and with design verification teams to craft/debug tests. You will also contribute to post-silicon debug and analysis of these designs.