PCIe Debug Engineer (Gen5/6)
Apply NowCompany: Prodapt
Location: San Jose, CA 95123
Description:
Overview
Prodapt has a singular focus on the Connectedness vertical. We partner with the leading creators of our hyper-connected world. Prodapt's customers range from telecom operators, digital / multi-service providers (D/MSPs), technology and digital platform companies in the business of connectedness. Prodapt's customers today help more than a billion people, and five billion devices stay connected.
Employing over 6000+ people, Prodapt has offices in North America, Europe, Latam, India, and Africa. We are part of the 128-year-old business conglomerate, The Jhaver Group, which employs over 30,000 people across 80+ locations globally.
We are seeking a highly skilled and adaptable engineer to join our dynamic team, focusing on PCIe debug gen5/6. In this role, you will work on complex SoC designs and collaborate with various teams to ensure the successful development and validation of our products. While the position is primarily aimed at Emulation Engineers, it is open to talented professionals with a background in Verification, Design, and Validation who are experienced with PCIe gen 5/6.
Responsibilities
Requirements
This position is open to candidates with varying backgrounds, including Verification Engineers, Design Engineers, and Validation Engineers, who possess the necessary skills and experience in emulation, scripting, and complex SoC development. Please note that the responsibilities and qualifications mentioned above provide a general overview of the job and may evolve to meet the specific needs of the team and projects. We value diversity in our workforce and encourage all qualified candidates to apply.
Prodapt has a singular focus on the Connectedness vertical. We partner with the leading creators of our hyper-connected world. Prodapt's customers range from telecom operators, digital / multi-service providers (D/MSPs), technology and digital platform companies in the business of connectedness. Prodapt's customers today help more than a billion people, and five billion devices stay connected.
Employing over 6000+ people, Prodapt has offices in North America, Europe, Latam, India, and Africa. We are part of the 128-year-old business conglomerate, The Jhaver Group, which employs over 30,000 people across 80+ locations globally.
We are seeking a highly skilled and adaptable engineer to join our dynamic team, focusing on PCIe debug gen5/6. In this role, you will work on complex SoC designs and collaborate with various teams to ensure the successful development and validation of our products. While the position is primarily aimed at Emulation Engineers, it is open to talented professionals with a background in Verification, Design, and Validation who are experienced with PCIe gen 5/6.
Responsibilities
- Collaborate with cross-functional teams to ensure the effective emulation and verification of complex SoC designs.
- Debug issues and deploy new capabilities using emulation platforms from leading vendors, including Synopsys, Cadence, and Mentor.
- Build, run, and debug SoC system failures on various emulation platforms such as Zebu, Palladium, HAPS, Protium, or Veloce.
- Attitude to take up diverse challenges and ramp up fast to serve Emulation customer needs.
- Good communication skills and team player.
- Ability and desire to mentor junior engineers on system level debug.
Requirements
- Bachelor's or higher degree in Electrical Engineering, Computer Science, or a related field.
- 8+ years or relevant work experience
- Proven experience in SoC emulation, verification, design, lab management, or validation.
- Strong knowledge of PCIe protocol (gen5/6). Knowledge of BIOS/Linux kernel is preferable.
- Highly preferable if independently brought up PCIe subsystem in Emulation.
- Basic understanding of Memory subsystem like HBM,DDR. Any direct experience bringing up these interfaces in emulation is highly desirable.
- Strong Debug knowledge ( Verdi)
- Extremely strong in analyzing Netlists.
- VCS compile flow and strong understanding of system Verilog.
This position is open to candidates with varying backgrounds, including Verification Engineers, Design Engineers, and Validation Engineers, who possess the necessary skills and experience in emulation, scripting, and complex SoC development. Please note that the responsibilities and qualifications mentioned above provide a general overview of the job and may evolve to meet the specific needs of the team and projects. We value diversity in our workforce and encourage all qualified candidates to apply.