SoC Logic Design Engineer (Junior)

Job Details:

Job Description:

Join us to drive Intel's next generation of architectural breakthroughs. Our team is at the forefront of developing customer-led, cutting-edge technologies that drive the future of semiconductor product development. If you are passionate about pushing the boundaries of technology, we want you on our team.

The Design Engineer:

• Perform logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
• Participate in the development of Architecture and Microarchitecture specifications for the Logic components at the IP and/or the SoC level.
• Excellent problem-solving and interpersonal skills, as well is good written and verbal communication skills.
• Willingness to work cross-geo/site when needed to accomplish results.
• Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Qualifications:

What we need to see (Minimum Qualifications):
Bachelor's or Master's degree in degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study and 1+ years' experience in Logic RTL Design Implementation and Debugging.

How to Stand Out (Preferred Qualifications):

• 1+ yrs. experience in Hardware Design Language (such as VHDL or Verilog).
• 1+ yrs. exp. In C/C++ programming
• 1+ years' experience with scripting languages
• Post graduate degree electrical engineering, computer engineering, computer science, math or in any STEM related field.
• Low power and UPF design experience (e.g., architecture, design, verification, etc.)
• Formal verification experience (assertion-based testing)
• Experience with UCIe, DDR, Ethernet, and/or PCIe/CXL protocols
• Experience with DFT (design for test)
• Experience implementing digital logic designs in FPGA systems or other emulation methods.
• Experience with adjacent areas of the SoC development process (e.g. synthesis, static timing analysis, formal equivalence checking, UVM Verification etc.)

Note: This position is primarily remote with periodic meetings in the Vancouver area.

Job Type:
Experienced Hire

Shift:
Shift 1 (Canada)

Primary Location:
Canada, Vancouver

Additional Locations:

Business group:
The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies-spanning software, processors, storage, I/O, and networking solutions-that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A

Annual Salary Range for jobs which could be performed in Canada
CAD 103,920.00-146,710.00
Salary range dependent on a number of factors including location and experience.

Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Canada Accommodation:

Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.