Packaging Architect

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.

Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!

If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.

Lightmatter is (re)inventing the future of computing with light!

About this Role

In this role, you will be responsible for developing packaging solutions from concept to product release, working closely with cross-functional teams such as substrate design, signal and power integrity, and more. You will collaborate with product architects, chip designers, and system architects to translate their needs into precise packaging requirements.

Your key responsibilities include defining packaging specifications related to performance, size, and integration, ensuring alignment with both technical and cost objectives. You will determine the optimal package architecture by balancing electrical, thermal, and mechanical performance, while staying within the project's budget and timeline. Effective collaboration is essential to navigate trade-offs and ensure alignment on the best solution. Additionally, you will partner with supply chain engineering experts to define packaging technology and material requirements for substrate fabrication, assembly, and raw material vendors, while working with the Quality & Reliability (Q&R) teams. You will also stay informed about emerging architectures by engaging with the product team and customers in the data center and high-end compute segments, while continuously monitoring the competitive landscape.

Responsibilities:

• Perform a trade-off analysis across silicon layout, die-to-die connectivity options, and package design/technology, evaluating their impact on key product metrics, including performance, cost, manufacturability, power efficiency, and form factor.
• Deliver a holistic approach to define a balanced package architecture that meets both system-level performance goals and packaging constraints.
• Determine the optimal package architecture by balancing electrical, thermal, and mechanical performance, while staying within the project's budget and timeline.
• Collaborate effectively to navigate trade-offs and ensure alignment on the best packaging solution.
• Partner with supply chain engineering experts to define packaging technology and material requirements for substrate fabrication, assembly, and raw material vendors.
• Work with the Quality & Reliability (Q&R) teams on packaging-related requirements and issues.
• Stay informed about emerging packaging architectures by engaging with the product team and customers in the data center and high-end compute segments.
• Continuously monitor the competitive landscape in packaging technologies and solutions.

Qualifications:

• Ph.D. or Master's degree in Electrical Engineering, Mechanical Engineering, Material Science, or a related field.
• Over 15 years of experience in characterization and design of 2D, 2.5D, & 3D flip-chip & wafer-scale packaging solutions.
• More than 10 years of experience in the areas of power-signal integrity, thermal-mechanical & system engineering domains.
• Over 10 years of experience in project/product execution & management.
• Proven track record of bringing up successful packages/ products with high power and high bandwidth applications from inception to product introduction.
• Demonstrated ability to perform trade-offs in silicon, package and system design and architecture to define package technology solutions for products.
• Extensive experience with high-speed interfaces, including SERDES, PCIe, and die-to-die (D2D) interconnects, with a strong understanding of their impact on packaging technology choices, such as substrate selection, interconnect architecture, signal integrity, and thermal considerations.
• Experience in HBM on package integration, DDR integration, and working knowledge of various memory types.
• Experience in various EDA & CAD tools.

Preferred Qualifications:

• Technical leadership experience in managing complex product development projects under challenging technical and schedule conditions.
• Ability to work independently and manage projects with minimum supervision.
• Excellent communication skills and ability to work well in cross functional teams and external suppliers.
• Creative thinker with the ability to solve problems quickly.

We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.

Salary Range

$245,000-$340,000 USD

Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)
• Retirement Savings Matching Program
• Life Insurance (Basic, Voluntary & AD&D)
• Generous Time Off (Vacation, Sick & Public Holidays)
• Paid Family Leave
• Short Term & Long Term Disability
• Training & Development
• Commuter Benefits
• Flexible, hybrid workplace model
• Equity grants

Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.

Export Control

Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.